1. Field of the Invention
This invention relates to packaged wire bonded semiconductor chips. More particularly, it relates to a wire bonded chip in which none of the wires used to make electrical contact between the lead frame and the chip terminals cross one another, thus eliminating a possible defect mechanism.
2. Description of the Prior Art
Wire bonding techniques have long been employed to position and affix leads to semiconductor chips prior to encapsulation of the chip in a protective coating.
Such techniques generally employ a lead frame to which the semiconductor chip is attached prior to encapsulation. Gold wires are used to connect terminals on the surface of the semiconductor chip to corresponding lead frame conductors.
In general, the initial design is such that these wires are kept within specified lengths. Good practice dictates that the length of the wires should be minimized and not exceed 100 times the diameter of the wire. However, when new chip designs are created in order, for example, to stack the chips in a denser package or to replace prior existing chips, the new designs often require one or more new terminal locations while the outside circuit or machine requirements demand that the external lead frame conductors remain in the same position. In such a case, extremely long wires which can cross several such other wires might be considered. If such long wires are used, as these long wires pass from the conductors of the lead frame to the respective terminal on the chip surface, undesirable effects can occur especially during the subsequent encapsulation step. For example, during the encapsulation steps there exists a strong likelihood that any such long wire will deform and short to one or more of the wires it is crossing. The possibility of such shorting, during the encapsulation process, increases with both the length of the crossing wire and the number of wires over which it crosses.